Murali Manohar
Physical design engineer
- Role
- Verification Validation Eng, Sr Engineer at Synopsys Inc
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Murali Manohar
Hi, having done my Master\'s in VLSI Design Engineering, I am currently working as an Full time employee at Capgemini Engineering, for the role of an Associate 1 Engineer. I am well versed with the backend flow of VLSI Design. I have worked on tools such as Design Compiler, Formality, ICC2 and Primetime. I have knowledge in the Logical Synthesis, LEC, STA & Physical Design.I aspire to explore the Semiconductor industry. Feel free to connect in case of similar interest or Opportunities.
Experience
Verification Validation Eng, Sr Engineer
Jun 2025 — Present · Noida, IN
Education
GITAM Deemed University
Master of Technology - MTech, Vlsi desgin
2021 — 2022
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