Murali Dharan
Package layout design engineer
- Role
- Package Layout Design Engineer at Micron Technology
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Murali Dharan
Currently working as package layout design engineer at Micron technology for the products(Flip chip/Wire bond), Memory IC (NAND, LPDDR, mNAND) Packages. Excellent skills IC Package layout design using Cadance APD/SIP softwareFamiliar with 2D Cad Design, CAM350Experience in PCB Design• Collecting inputs for design from client and estimating the design effort.• Handled ATE Probecards Load board,characterization & Burn in boards • Logic symbol creations and Schematic capture.• Moderate Knowledge of Library creation.• PCB layout designs as per industrial standards and as per customer requirements. • Setting the constraints (Design rules) according to design requirements.• Good knowledge and experience on High Density Interconnect (HDI) technology using Blind/Berried vias.• Good knowledge in Signal Integrity guidelines on PCB design (reflection noise, crosstalk noise, ground bounce etc.)• Good knowledge in EMI/EMC guidelines and implementation on PCB design.• Good knowledge in Power plane and Power supply requirements• Good knowledge in Analog, Digital and Analog-Digital mixed signals• Designing the PCB’s according to DFM (Design for Manufacturing) and DFA (Design for Assembly) techniques.• Deciding the PCBs Layer Stack-ups according to complexity of design and impedance matching requirements.• Validating the data for PCB manufacturing.• Involved in PCB fabrication process.
Experience
Package Layout Design Engineer
Oct 2021 — Present · Hyderabad, IN
Education
Goverment Polytechnic College,Coimbatore
Diploma
2011 — 2014
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