Mukesh Guptha Chinta

||Design Verification intern at Cadence||Advanced VLSI Design and Verification Trainee at Maven silicon||VLSI enthusiast ||

Role
Design Verification Engineer at Cadence
Location
Bengaluru, IN
LinkedIn followers
500 followers

About Mukesh Guptha Chinta

I am an intern and a \"graduate student in Electrical Engineering\"who has a strong interest in VLSI (Very-Large-Scale Integration). I have been fascinated by the complexities and possibilities of VLSI technology since I came upon my first transistor-level design in my engineering.The challenge of designing and optimizing complex circuits to fit within tiny silicon chips fascinated me. I am proficient in using industry-standard tools like xilinx Virtuoso and Mentor Graphics ModelSim. My expertise extends to design and verification, design for testability. I\'ve got practical experience through various initiatives and internships. During my internship at cadence, I contributed to design and verification of LPDDR5X. This experience provided me with practical insights into the full VLSI design and verification. I want to be at the forefront of VLSI innovation, pushing the boundaries of integrated circuits and their applications in emerging technologies. My commitment to VLSI is motivated by both passion and an unwavering quest of perfection. I am enthused about the opportunity to push the boundaries of what is feasible in this field, and I am determined to make big contributions to the VLSI community.

Experience

  1. Design Verification Engineer

    Cadence

    Jan 2024 — Present · Bengaluru, IN

    Working on LPDDR5/5X PHY verification.Working on an end-to-end scoreboard for data path and command path.Proficient at navigating through the test bench and debugging issues.Handled the regression analysis and reporting to customer config, responsible for maintaining the passing percentage to 100% in periodic regression.Developed scripts for automation to inspect coverage and regression reports to reduce manual effort.Working corner test cases for the uncovered bins and excluding the toggle and code coverage after getting waivers from the design team.

Education

  • Vignan's Foundation for Science, Technology & Research

    Bachelor of Technology - BTech

    2019 — 2023

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Mukesh Guptha Chinta — Design Verification Engineer at Cadence in Bengaluru, IN | Unifers