Mukesh Goyal
Sr Silicon Design Verification Engineer at Google | Ex Qualcomm || Ex Micron
- Role
- Sr Silicon Design Verification Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Mukesh Goyal
Brief Profile Summary• Bachelor\'s Degree in Electronics and communications.• 14+ years of industry experience in Design Verification.• Good working knowledge about LPDDR5 protocol.• Working hands on testcase development in C for System Level Verification.• Excellent skill in developing UVM and OVM based test-bench from scratch.• Good Knowledge of SOC level test-bench development in UVM.• C Reference Model Integration in SV and UVM based TB.• Coverage based Verification(Functional Coverage and Code Coverage).• System Verilog Assertion Based Verification.• Developing Design Specification, Micro-architecture,Verification Plan etc.• Working hand on Clock Gating Mechanism for low power design implementation.• Basic System C Modelling knowledge.• Familiar with Unix-Shell and Perl scripting for automation.• Tools : Cadence NCSIM, Modelsim, Xilinx ISE, VCS, NOVAS• Communication Protocol : I2C, SPI, UART• Security Protocol : AES-Fips197 (Advanced Encryption Standard ).• Bus Protocol : AMBA - AXI4, AMBA - AHB. APB, OCP
Experience
Sr Silicon Design Verification Engineer
Jan 2024 — Present · Bengaluru, IN
Education
IET BHADDAL
Bachelor's degree, Electronics and communication
2008 — 2012
Skills
- Modelsim
- Cadence Incisive
- C++
- Asic
- Vhdl
- Perl
- Vlsi
- Xilinx Ise
- Microcontrollers
- Ncsim
- Rtl Design
- Open Verification Methodology
- Gcc Compiler
- Spi
- Amba Ahb
- I2c
- Rtl Coding
- Systemc
- Uvm
- Systemverilog
- Verilog
- Integrated Circuit Design
- Microprocessors
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