Mrityunjay Nath
AMD || Ex-INTEL || RTL Design || ASIC || SoC || Semiconductor
- Role
- Mts Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Mrityunjay Nath
A competent experienced professional with total work experience of 13 years in RTL Design.Experience that broadly classified into the following categories- Experienced ASIC / SoC / Sub-Systems RTL Designer- Experience in ASIC design engineering including development of ASIC IPs and Subsystems- Experience in RTL design with Verilog/System Verilog/VHDL of digital blocks, and integration- Experienced in timing analysis, constraints writing- Have worked in LINT, CDC analysis using Spyglass, Synthesis and STA using Genus, DC, PT- Having Good Communication and Problem Solving Skill- Scripting understanding of Perl, TCL, Python
Experience
Mts Silicon Design Engineer
Apr 2024 — Present · Bengaluru, IN
Education
K.V.AFS airforce station,bagdogra (west bengal)
Intermediate, mathematics, physics, chemistry, biology
2004 — 2005
Birla Institute of Technology and Science, Pilani
M.Tech Micro electronics
C - DAC, NOIDA
Post Graduate Diploma, Embedded System and Vlsi Design
2012 — 2012
K.V.No 2 Itanagar, Arunachal Pradesh
HighSchool (2003 passing out year), science, mathematics,english
2002 — 2003
Dr. A.P.J. Abdul Kalam Technical University
Bachelor's degree, Electrical, Electronic and Communications Engineering Technology
2005 — 2009
Skills
- Altera Quartus
- Fpga
- Very-Large-Scale Integration (Vlsi)
- Verilog
- Vlsi
- Vhdl
- Code Coverage
- Shell Scripting
- Spyglass
- Functional Verification
- Perl
- Altera Avalon Bus
- Modelsim
- Tcl
- Digital Electronics
- I2c
- Spyglass Cdc
- Debugging
- Linting
- Uvm
- Systemverilog
- Microcontrollers
- C++
- C
- Unix Shell Scripting
- Questa Sim
- Spi
- Amba Ahb
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