Mrinal Mathur
Staff Design Verification Engineer
- Role
- Staff Design Verification Engineer at Micron Technology
- Location
- Union City, CA, US
- LinkedIn followers
- 500 followers
About Mrinal Mathur
Experience of using UVM/SystemVerilog for verification- Knowledge of constrained random verification methodologies and functional coverage driven verification environment- Took part in entire project cycle starting from Specification to validation by writing Testplan, Test case coding, debugging, Regression and coverage- Ability to quickly learn new technologies and adapt to different working environments
Experience
Staff Design Verification Engineer
Nov 2024 — Present
Education
UCSC Silicon Valley Extension
VLSI Engineering
2017 — 2018
Nirma University, India
Bachelor's of Technology, Electronics and Communication Engineering
2008 — 2012
University of Illinois Chicago
Master's Degree, Electrical and Computer Engineering
2012 — 2014
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.