Mounica C.

About Mounica C.

Worked as Implementation Engineer and STA Engineer for Microchip and QUALCOMM clients for 3 years.Having good Experience on synthesizing the netlists using synopsys EDA tools like DC_SHELL, DCNXT and cadence EDA tools like genus.• Experience with advanced technology nodes like 5nm, 7nm 16nm, 28nm.• Good Hands on experience in implementing synthesis methodologies like physical aware synthesis, low power synthesis.• Good knowledge on timing exceptions, mutually exclusive clocks, and defining the port constraints.• Having good experience in timing closure with multiple iterations, mode analysis and managing constraints.• Hands-on experience with multimode synthesis and timing closure.• Good knowledge on multimode synthesis and hands on experience of physical synthesis and logical synthesis and clearing unresolved references.• To Understand and apply STA concepts such as max transition, uncertainty and latency.• Good knowledge on STA concepts such as CPPR, OCV, AOCV and clock gating.• Good knowledge on timing optimizations techniques.• Good knowledge on low power synthesis and multivoltage domains.• Hands on experience with formal verification by clearing aborts and non equivalence points.• Good knowledge on synthesis and hands on experience of physical synthesis and logical synthesis and clearing unresolved references.• Understanding Timing Exceptions and identifying false paths and multicycle paths.• Good knowledge on RTL coding and clearing the Lint summary.• To Understand and apply STA concepts such as max transition, uncertainty and latency.• Good knowledge on STA concepts such as CPPR, OCV, AOCV and clock gating.Technical / CAD Skills: Eda Tools:• Synthesis : DC, DCNXT, Genus• PNR : Innovus, FC• STA : Tempus, PrimeTime• Physical Verification : Calibre • Scripting : Tcl• RTL coding : Verilog• Technology/Layers : TSMC 5nm/13Layers.• Tools Used : DCNXT and Prime Time, genus,tempus.• Instance Count : 1.6M.

Experience

1. Physical Design Engineer

   NVIDIA

   Feb 2026 — Present · US

   Working as Physical design engineer

Education

• Portland State University

  Master of Engineering - MEng, Electrical, Electronics and Communications Engineering