Mouliswar S
Validation & Debug Engineer at UST | Ex - L&T | Post Silicon | CXL | DDR | PCIe | Processor | Storage & USB | Power Management | DPMO | Linux | RAS | Graphics | Network
- Role
- Graphics Validation Engineer at UST
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Mouliswar S
Silicon Validation Engineer with nearly 6 years of experience in Post-Silicon Validation,…
Experience
Graphics Validation Engineer
Dec 2024 — Present · Bengaluru, IN
Education
EMMANUEL.Hr.Sec.School
High School
Murugappa polytechnic college
Diploma of Education
2017 — 2020
SRM University
Bachelor of Computer Application - BCA
2023 — 2026
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.