Moses Prabhakar Naligala
Senior Physical Design Engineer at Nvidia
- Role
- Senior Physical Design Engineer at NVIDIA
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Moses Prabhakar Naligala
Worked on multiple SoCs in process nodes of 3nm, 6nm,7nm,10nm, 22nm across Intel and TSMC foundries. Owned Physical verification closure of multiple partitions across multiple projects. Owned Bump planning and RDL design of a TSMC N6 based SoC.Currently working as a Physical Verification Lead as well and Partition owner in a Next-Gen Intel Client SoC Project.
Experience
Senior Physical Design Engineer
Jul 2025 — Present · Hyderabad, IN
Education
Indian Institute of Technology, Kharagpur
Master of Technology - MTech, Microelectronics and VLSI
2017 — 2019
Mahatma Gandhi Institute Of Technology
Electronics and Communications Engineering
2012 — 2016
Skills
- Microsoft Office
- Linux
- Matlab
- Ubuntu
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