Mohammed Mazhar

About Mohammed Mazhar

Experienced Circuit Design Engineer ( Dutycycle Correction blocks, High Speed Clock distributions, DLL and it\'s sub circuits, TX Serializers, Clock Splitters etc) with an extensive history of working in 5nm, 7nm, 10nm, 14nm nodes from spec definition to the Prod stage while simultaneously assisting the cross-functional domain to ensure the effective execution and timely delivery to the stakeholders. IP for which circuits were designed: UCIE, die to die PHY, DDR PHYFurthermore-Hands on experience in Layout floor plan and review matching, cross talk-Formal equivalence of Circuit and understanding its Behavioral modelling-Experienced in Circuit reliability verification and aging effects -Exposure towards Circuit automation for post processing of the simulations- Experienced in designing the state of the art millimeter-wave front-end blocks of the receivers, LNAs and Filters-Execution of the chip circuit schematic and its full custom Layout design-Hands on experience in BiCMOS and Si CMOS analog design.Technical Expertise- Design and modelling of the millimeter-wave passive devices (CPW, Microstrip, and low-frequency Stripline) and their layouts using 3D-Electromagnetic simulation tools- Cadence Virtuoso Schematic Editor, Assura, Orcad PSpice Simulator- Ansoft HFSS, Agilent ADS Momentum, CST Microwave Studio- Xilinx ISE- Radio frequency Lab Equipments-Latex, Kalediagraph, Microsoft Visio System design applications-Exposure in WiGig Alliance, network latency etc-Technical paper presentations in International and National conferences in Malaysia and India.

Experience

1. Analog Design Engineer

   Intel

   Dec 2021 — Present · Bengaluru, IN

Education

• Dayananda Sagar College Of Engineering, Bangalore

  Master’s Degree, Microelectronics and Control Systems

• PDA college of engineering

  Bachelor’s Degree, Electronics and Communication