Mitul Shah
ASIC Verification Engineer
- Role
- Sr Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Mitul Shah
Working experience for extracting the design features and developing the test plan.• Experience in development of test-bench from scratch in SV (System Verilog)/UVM(Universal Verification Methodology) based environment and C++ based environment to do block-level functional verification.• Hands-on experience in debugging testbench and design-related issues.• Develop constraint-based sequence generators, self-checkers, and assertions to verify different test cases.• Experience in analyzing functional/code coverage and resolving the holes in coverage.• Expertise in regression failure debugging.• Protocol knowledge of APB (Advanced Peripheral Bus), AHB (Advanced High-performance Bus), AXI(Advanced eXtensible Interface) PCS (Physical Coding Sublayer), HDLC (High Level Data Link Control ), and GFP(Generic Framing Processing) protocol knowledge.
Experience
Sr Silicon Design Engineer
Sep 2025 — Present · Hyderabad, IN
Education
L.J. Institute Of Engineering and Technology
Bachelor's degree, Electronics and Communications Engineering
2014 — 2018
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