Miriyala Sneha

Aspiring DFT Engineer | Passionate about VLSI, Chip Design & Testability

Role
Dft Trainee at ChipEdge
Location
Hyderabad, IN
LinkedIn followers
500 followers

About Miriyala Sneha

I am an Electrical and Electronics Engineering graduate with a strong interest in VLSI…

Experience

  1. Dft Trainee

    ChipEdge

    Jan 2025 — Present · Hyderabad, IN

    DFT Design Course – ChipEdge Technologies Pvt LtdDuration: 6 MonthsCompleted a 6-month, industry-focused training in Design for Test (DFT), covering:Scan Insertion, ATPG, MBIST, LBIST, and JTAGHands-on experience with tools like Mentor Tessent & Synopsys DFTGained practical exposure through real-time project work and tool-based simulationsThis course strengthened my understanding of digital testing strategies and prepared me to work on real-world DFT challenges in VLSI design.

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Miriyala Sneha — Dft Trainee at ChipEdge in Hyderabad, IN | Unifers