Min Woo
Quality and Reliability Lead
- Role
- Quality and Reliability Lead at Google
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Min Woo
Over two decades of semiconductor industry experience with deep expertise spanning silicon technology, advanced packaging, and system-level reliability across world-class organizations including Arm, Broadcom, Apple, NVIDIA, and IBM- Proven track record in managing quality and reliability from pre-silicon to post-silicon, leading qualification of cutting-edge technologies such as 3nm process nodes, 2.5D/3D packaging, HBM, and advanced interconnects- Spearheaded cross-functional collaboration between design, operations, and supply chain teams to ensure first-pass success in product qualification, risk mitigation, and yield improvement for high-performance ASICs and SoCs- Extensive supplier engagement experience with top-tier foundries and OSATs (TSMC, Samsung, Amkor, ASE, SPIL, KYEC), successfully aligning manufacturing and quality requirements to achieve robust production readiness- Hands-on leadership in product and package reliability qualification, failure analysis, and ESD/Latch-up test systems—developing test plans, hardware, stress conditions, and statistical models for device lifetime predictions- Played key roles in first-time silicon tape-outs, NPI readiness, and mass production ramp, enabling successful delivery of AI chips, networking ASICs, and mobile SoCs with high reliability and yield performance- Designed and implemented reliability infrastructure and quality management systems (QMS) across multiple companies, driving continuous improvements, risk control, and customer satisfaction- Recognized as a go-to expert for DFx (DFM, DFT, DFQ, DFR), HTOL, ESD, and reliability test hardware, delivering innovative solutions and educating cross-functional teams on quality best practices.
Experience
Quality and Reliability Lead
Mar 2026 — Present · Sunnyvale, CA, US
Education
Penn State University
Degree: BS, Electrical Engineering
1995 — 2000
Skills
- Product Engineering
- Esd Control
- Cmos
- Integrated Circuits (Ic)
- Application-Specific Integrated Circuits (Asic)
- Semiconductors
- Latch Up
- Debugging
- Esd
- Asic
- Silicon
- Ic
- Reliability Engineering
- Analog
- Reliability
- Failure Analysis
- Semiconductor Industry
- Mixed Signal
- Circuit Design
- Electronics
- Soc
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.