Mikhail Asiatici
Senior Member of Technical Staff @AMD
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WORK HISTORY
Senior Member of Technical Staff @AMD
Contributed to the non-core architecture and SystemC model of AI Engine/Ryzen AI NPUs. In particular, I worked on the control architecture of the AIE-ML v2 architecture included in the AMD Versal AI Edge Series Gen 2 SoCs and on control-related optimizations of the XDNA2 NPU in the Strix Point APU.I\'m currently transitioning to performance modelling and architecture exploration of future AMD datacenter GPUs (MI series) and rack-scale solutions.
EDUCATION
EPFL
Master's degree (semester 3/3), Nanotechnologies for ICT
Grenoble INP - UGA
Master's degree (semester 2/3), Nanotechnologies for ICT
Politecnico di Torino
Master's degree (semester 1/3), Nanotechnologies for ICT
Politecnico di Torino
Bachelor's degree, Electronics Engineering
ISITIP Verrès
High school degree, Electronic and Telecommunication Engineering
SKILLS
ABOUT MIKHAIL ASIATICI
Ph.D. graduate in Computer Science with 10 years of digital hardware design and computer architecture experience. During my Ph.D, I had the chance to publish in top FPGA and computer architecture venues (ISCA, ISFPGA, FPL, FPT).
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