Mike Farrell
Senior IC Layout Manager at Analog Devices
- Role
- Senior Layout Engineer at Analog Devices
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Senior Layout Engineer
Apr 2008 — Present · San Jose, CA, US
Education
University of Limerick
BENG, Electronic Engineering
2003 — 2005
Skills
- Analog Circuit Design
- Cadence Virtuoso
- Mixed Signal
- Drc
- Semiconductors
- Eda
- Asic
- Pll
- Analog
- Cmos
- Power Management
- Floorplanning
- Physical Design
- Physical Verification
- Lvs
- Cadence
- Ic
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