Mikael Brun
Principal Layout Engineer @Arago
Grenoble, FR
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WORK HISTORY
Nov 2025 — Present
Principal Layout Engineer @Arago
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Grenoble, FR
EDUCATION
2003 — 2004
Université Joseph Fourier (Grenoble I)
Licence Microelectronique Et Microsysteme, Microelectronique
2001 — 2003
Université Grenoble Alpes
DUT mesures physiques
SKILLS
SocCadence VirtuosoCao ÉlectroniqueSemi-Conducteur
ABOUT MIKAEL BRUN
KEY SKILLS- Leading Layout project team across multiple site (UK,USA,India)- Strong layout expertise in SOI, bulk and FinFET technologies including multiple patterning- Very good knowledge of Layout Design rules across multiple foundries from 90nm to 7nm- Proficient in Memory layout (ROM,SRAM,PCM)
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