Mihir Vagh
Verification Lead @Sci Semiconductor
Cambridge, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Aug 2024 — Present
Verification Lead @Sci Semiconductor
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EDUCATION
2003 — 2004
Institute for System Level Integration
MSc, System Level Integration
1998 — 1999
ENSEEIHT
Electronique
1996 — 2000
The University of Manchester
MEng, Electronic & Electrical Engineering
SKILLS
UvmSocVerilogPerlEmbedded SystemsSystemverilogOvmFormal VerificationWireless3gLteDspApplication-Specific Integrated Circuits (Asic)Field-Programmable Gate Arrays (Fpga)SimulationArmCSemiconductorsVhdlSimulationsRtl DesignC++AlgorithmsFirmwareElectronicsArm ArchitectureSystem on a Chip (Soc)VmmVerificationFpgaEmbedded SoftwareAsicDigital Signal ProcessorsWireless Technologies
ABOUT MIHIR VAGH
Verification Lead
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