Mihir Shah

About Mihir Shah

Experience at Mentor Graphics :1) Responsible to port customer designs on Emulator2) Experience of different emulation flow like in-circuit emulation, co-model emulation, standalone.3) Exposure of gate level emulation, power aware flows, low power emulation, fault insertion4) Understand the customer emulation flow and port similar flow in regression5) Develop a infrastructure for automation using perl/bash6) Develop an enhancement architecture(as per customer need) and provide it to relavent R & DExperience at Masamb Electronics :1) Design a communication protocol for SoC by which different IPs can communicate effectively2) Validated the top level SoC through C and Assembly language3) Verification of different IPs like DMA, DSP using SV constrained random test-benchesExperience at SAC-ISRO :1) Designed a clock infrastructure for \"Chandrayaan-1\" camera using VHDL2) Validation of whole camera system by integrating it with other architecturesSpecialties: Emulation ExpertSystem Verilog/VerilogPerlPin level validation

Experience

1. Principal Engineer

   Arm

   Apr 2024 — Present · IN

Education

• Gujarat University

  HSC, Science

  2000 — 2001

• Saurashtra University, Rajkot

  B.E., Electronics & Communication

  2001 — 2005

• Vedant, SCL

  APGD, VLSI Design

  2007 — 2007

Skills

• Systemverilog
• Modelsim
• Functional Verification
• Asic
• Vhdl
• Verilog
• Perl
• Eda
• C
• Vlsi
• Rtl Design
• Soc
• Static Timing Analysis