Mihir Pratap Singh
Physical Design Engineer at NVIDIA
- Role
- Asic Physical Design Engineer at NVIDIA
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Mihir Pratap Singh
ASIC Engineer focussing on physical design at NVIDIA, Santa Clara.
Experience
Asic Physical Design Engineer
Feb 2023 — Present · Santa Clara County, CA, US
I work as a CAD Engineer in the Logic Optimization and Design Implementation team at NVIDIA, Santa Clara, CA. Key Words: CPU, GPU and SOC synthesis flow and methodology development, PPA improvement.Focus:> Primarily develop and maintain synthesis flows for the latest synthesis tools such as Fusion Compiler, Design Compiler and Genus and also work on backend flows for PnR tools such as ICC2 (Synopsys) and EDI (Cadence).> Assess synthesis tools for features focussed on improving timing, area usage, performance in any physically implemented design for CPU/GPU/SOC.> New technological process bringup, process transition, synthesis bringup for new designs.> Work with tool vendors towards improving synthesis and PnR tool quality, ease of usage, while also suggesting new techniques and improvements towards better PPA (Power, Performance and Area) output from the tool.
Education
Birla Institute of Technology and Science, Pilani
B.E. (Hons.), Electrical and Electronics Engineering
Birla Institute of Technology and Science, Pilani
M.Sc. (Hons.), Economics
UC San Diego Jacobs School of Engineering
Master of Science - MS, Electrical and Computer Engineering
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