Menati Vasudeva Reddy
MTS 2 at NetApp | Ex-Software Intern at STMicroelectronics | 500+ LeetCode (Knight badge) | 5⭐ Python at HackerRank |AI/ML, Backend Development, C, C++, Java, Python | Oracle Certified Java Programmer | M.Tech CSE at VIT
- Role
- Associate Software Engineer at STMicroelectronics
- Location
- Tirupati, AP, IN
- LinkedIn followers
- 500 followers
About Menati Vasudeva Reddy
2 at NetApp working on SAN (Storage Area Network) and Ex Software at for 1 year. At STMicroelectronics i was Part of Silicon Qualification Hub (Testchip team) Built tools for () and of Developed a to validate setup/hold margins, skew, and clock uncertainties Automated analysis workflows using, C++, improving speed and accuracy Reduced timing errors and improved memory validation efficiency.🤖 / & : using IoT + Q-Learning for emergency vehicle prioritization - with Deep Learning + OpenCV and with NLP - using React.js, Spring Boot, MySQL IoT-based power optimization system with smart relays and auto alerts for home automation. & : Python, Java, C, C++, Perl /: Machine Learning, Deep Learning, NLP, Computer Vision, Exploratory Data Analysis (EDA): Spring Boot, REST APIs, Unix/Linux, Shell scripting : Docker, CI/CD, Git, Power BI, Tableau : Data Structures & Algorithms, MySQL, Object-Oriented Design & : – IoT-based energy-saving technique for Home Automation on Adaptive traffic signal control signal for emergency vehicles prioritization using IoT (-)+ – (.%)🥇 Best Paper Award – SET Conference, VIT Chennai Let’s connect and talk about tech! I’m passionate about building software applications that solve real problems and make life easier.
Experience
Associate Software Engineer
Aug 2024 — Present · Noida, IN
Developed the Timing Extractor Tool, automating semiconductor timing validation by extracting setup/hold margins, clock uncertainties, and skew for accurate pre-fabrication analysis.• Automated early Power, Performance, and Area (PPA) analysis workflows, leveraging power analysis and timing extraction tools to enhance accuracy and reduce manual effort.• Optimized debugging processes by scripting in Python and Perl, efficiently identifying and resolving design glitches in complex circuits.• Streamlined semiconductor design and development by processing large datasets, improving workflow efficiency, and accelerating engineering decision-making.
Education
Sri Chaitanya Junior College Tirupati
Intermediate 12th
Sri Krishna College of Technology
Bachelor of Engineering - BE, Computer Science
Sri Chaitanya Techno School Tirupati
10th
Vellore Institute of Technology
Master of Technology - MTech, Computer Science and Engineering
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