Meghana Appaiah
- Role
- Soc Design Engineer at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Meghana Appaiah
Senior Design Verification Engineer with 10+ years of experience in ASIC/SoC…
Experience
Soc Design Engineer
May 2018 — Present
Skills
- Fpga
- Integrated Circuit Design
- Perl Script
- Application-Specific Integrated Circuits (Asic)
- Eda
- Oracle Sql
- Open Verification Methodology
- Logic Design
- C++
- Asic
- Functional Verification
- C
- Verilog
- Sql
- Modelsim
- Unix
- Sterling Commerce
- Uvm
- Perl
- Rtl Design
- Supply Chain Management
- Digital Electronics
- Systemverilog
- Computer Architecture
- Linux
- Vlsi
- Arm
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.