Tabrez Akram
Physical Design Engineer
- Role
- Senior Physical Design Engineer at Silicon Patterns
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Tabrez Akram
Physical Design Engineer specializing in advanced-node ASIC implementation.Contributed to 3 successful tapeouts (2×5nm, 1×3nm) for AMD programs including Sarlak, Krackan-1, and Magnus.Experience implementing high-performance IPs including: • Data Fabric (DF)• ACP• IPU• PCIeHands-on experience across the full physical design flow:• Floorplanning• Placement• CTS• Routing• Timing closure• SignoffTools: ICC2, PrimeTime
Experience
Senior Physical Design Engineer
Aug 2025 — Present
Education
MLR Institute of Technology
Bachelor of Technology, Electronics and Communications Engineering
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