Mayank Rege
CPU Verification Engineer @ IBM | SystemVerilog, Technical Leadership
- Role
- Cpu Verification Engineer at IBM
- Location
- Mumbai, MH, IN
- LinkedIn followers
- 500 followers
About Mayank Rege
Experienced Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Perl, C++, Universal Verification Methodology (UVM), SystemVerilog, and Microprocessors. Strong engineering professional with a Master of Science focused in Computer Engineering from Syracuse University LC Smith College of Engineering.
Experience
Cpu Verification Engineer
Dec 2024 — Present · IN
Education
Syracuse University LC Smith College of Engineering
Master of Science, Computer Engineering
2006 — 2008
Syracuse University
master of scinece, Computer Engineering
Syracuse University
Master of Science - MS, Computer Engineering
Rajiv Gandhi Prodyogiki Vishwavidyalaya
Bachelor of Engineering, Electronics and Communication Engineering
2001 — 2005
Welingkar Institute of Management
Post Graduate Diploma in Management, Project Management
Skills
- Functional Verification
- Processors
- Microwind, Assembly Coading
- Debugging
- Microsoft Office
- Linux
- C++
- C
- C++, Perl, Cadence, Html, Visual Studio 2005
- Analog
- Systemverilog
- System Verilog
- Uvm
- Microprocessors
- Testing
- Soc
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