Mayank Verma

About Mayank Verma

12 years of work exp. in VLSI RTL Design domain• Expertise in High-Speed, High-Performance pipelined design methodologies• Comprehensive understanding of DRAM classifications, AMBA protocols and Coherent Interconnects• Domain knowledge of Coherent memory system architecture• Development of Microarchitecture specifications• Proficiency in Front End Design Flow encompassing - Verilog/SystemVerilog - Synthesis (Timing)- clock domain crossing(CDC)- Lint analysis - Performance Analysis

Experience

1. Silicon Engineer

   Google

   Jul 2022 — Present · Bengaluru, IN

   Managing the design of the Memory subsystem engine for Pixel mobile System on Chip (SoC) at Google as a member of the SoC platforms and interconnect team. Responsibilities include- Defining microarchitecture for new features- Implementing designs and ensuring silicon functionality and quality- Resolving timing and conducting synthesis data analysis- Collaborating closely with performance, formal and functional verification teams- Analyzing and improving performance, power, and area (PPA) characteristics for each product generation.Major Projects- Memory subsystem Engine v2 supporting LPDDR6 - QoS remapper - SRAM based buffer and response deinterleaver - Crossbar restructure for better performance and lower latency - Multi beat narrow command packer and response unpacker for unsupported interfaces - AMBA RD-only, Wr-only bridges variant development - Arbitration scheme analysis for performance improvement - Clock gating scheme for interconnect components

Education

• Greater Noida Institute of Technology

  Bachelor of Technology (B.Tech.), Electronics and Communications Engineering

  2008 — 2012

• CDAC-ACTS, PUNE

  Post Graduate Diploma in VLSI, VLSI Design

  2012 — 2013

Skills

• Asic
• Hardware Architecture
• Static Timing Analysis
• Digital Electronics
• Amba
• Very-Large-Scale Integration (Vlsi)
• Debugging
• Perl
• Eda
• Soc
• Clock Domain Crossing
• Application-Specific Integrated Circuits (Asic)
• Verilog
• Rtl Design
• C
• High-Speed Digital Design
• Functional Verification