Mayank Kumar Tarai
Design Verification engineer at Analog Devices
- Role
- Design Verification Engineer at Analog Devices
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Mayank Kumar Tarai
Design Verification Engineer with 2 years of experience in design and performance verification of various subsystems using System Verilog (UVM). Good knowledge of testbench development as well as experience with industry standard simulators with exposure in verification of AMBA protocols based designs/BFMs by developing testbenches and creating assertions to verify protocol compliance
Experience
Design Verification Engineer
Aug 2023 — Present · Bengaluru, IN
Education
Kendriya Vidyalaya I.S.P
High School 10th
2013 — 2014
Bhilai Institute of Technology (BIT), Durg
B.TECH
2017 — 2020
National Institute of Technology Durgapur
Master of Technology - MTech
2020 — 2022
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