Mayank Bajpai

Hardware Design Engineer @Jio Platforms Limited Jpl

Navi Mumbai, MH, IN
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WORK HISTORY

Jan 2021 — Present

Hardware Design Engineer @Jio Platforms Limited Jpl

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Navi Mumbai, IN

Working on Smartphone VR Controller and & AR Glass Products Schematic Design, PCB layout, Gerber data and BOM Review, PI Analysis, Coordinate for Mechanical Enclosure design and firmware team, DFM(Design for Manufacturability), DFT(Design for testing).Create a document related to Hardware design, Power Consumption Calculation, Power tree,Value engineering, GPIO Chart, Components Reliability and Hardware test plan for Board bring-upComponents selection and change EOL Components.

EDUCATION

2018 — 2020

Netaji Subhas Institute of Technology

Master of Technology - MTech

2013 — 2017

Raj Kumar Goel Institute of Technology, Ghaziabad

B.TECH

ABOUT MAYANK BAJPAI

Experience in Various Phases of Product life cycle Management (PLM) for embedded product,…

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Mayank Bajpai — Hardware Design Engineer at Jio Platforms Limited Jpl in Navi Mumbai, MH, IN | Unifers