Matthew Eckl

Hardware Performance Engineer | System Architecture | Performance Tuning | High Performance Computing | Networking | Software Engineering

Role
Technical Lead Fpga Performance Validation Engineer at Altera
Location
Austin, TX, US
LinkedIn followers
500 followers

About Matthew Eckl

Hardware Performance Engineer with deep expertise in hardware system design across…

Experience

  1. Technical Lead Fpga Performance Validation Engineer

    Altera

    Jan 2025 — Present · Raleigh, NC, US

    Led performance and functional validation activities for ARM A55/A76 based Hardened Processor subsystem and AMBA based bridge interfaces to the FGPA core logic.• Partnered with the Architecture and Emulations teams to reduce failures into usage cases suited for execution in the Emulation environment to allow for fine grain debug. Allowing diagnosis and resolution of performance losses of up to 90% before Tape-Out.• Identified and evaluated tuning of CPU and interconnect runtime configuration settings to work around bugs and improve workload performance, allowing silicon to begin shipping to customers 2 quarters earlier than initial commitments.

Education

  • Georgia Institute of Technology

    BS

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Matthew Eckl — Technical Lead Fpga Performance Validation Engineer at Altera in Austin, TX, US | Unifers