Matteo Maria A.
Principal Mpam Architect @Arm
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WORK HISTORY
Principal Mpam Architect @Arm
Cambridge, GB
I am responsible for designing and overseeing the architecture of the Memory System Resource Partitioning and Monitoring (MPAM) within the organisation. I provide technical leadership and guidance to the engineering teams working on MPAM. I work closely with other architects, engineers, and stakeholders to ensure that the MPAM architecture aligns with the overall system architecture and business goals.I follow the latest advancements in memory system technologies and incorporate innovative solutions into the MPAM architecture. This includes conducting research with selected academic partners.
EDUCATION
Università di Pisa
Bachelor's degree, Computer Engineering
Università di Pisa
Master's degree, Computer Engineering
Università di Pisa
Doctor of Philosophy - PhD, Computer Engineering
SKILLS
ABOUT MATTEO MARIA A.
I’m a senior technology leader at Arm, where I lead the development of next-generation computing architectures with a focus on high-performance heterogeneous systems. As Lead Architect for the Memory Partitioning and Monitoring Architecture (MPAM), I drive efforts to ensure Arm-based systems efficiently manage memory resource allocation, contention, and interference—key challenges in domains like mobile, automotive, robotics, and infrastructure.My expertise spans quality-of-service (QoS), deterministic real-time computing, and system performance optimization. With over 15 years of experience across industry and academia — including a Ph.D. and prior work at NVIDIA — I’ve built a career bridging deep research and product-driven innovation in computer architecture.I earned my Ph.D. in Information Engineering from the University of Pisa in 2012, focusing on QoS algorithms for 3.5G/4G networks. During my doctoral work, I gained hands-on experience with simulation and networking technologies, skills that proved invaluable in my transition to industry.At NVIDIA (2012–2015), I worked in the Algorithm and Standards group, developing LTE network simulation software and evaluating product performance. This role allowed me to apply academic research to practical, high-performance computing challenges.Since joining Arm in 2015, I’ve taken on increasing leadership responsibilities within the Architecture and Technology Group. I now lead the MPAM architecture team, working across early-stage research, simulation, prototyping, and feature deployment. Our work supports QoS, real-time and high-performance requirements across Arm’s major markets —from mobile and IoT to automotive and infrastructure.Throughout my career, I’ve focused on making multicore systems more predictable and efficient. I’ve contributed to architectural features that address shared-resource contention and improve system determinism — helping platforms meet strict timing guarantees in workloads like autonomous driving and robotics.I’ve published widely, co-authoring scientific papers and patents, including an invited paper at COMPSAC 2020, and delivered a keynote at ECRTS 2020 on high-performance real-time systems.Beyond engineering, I enjoy engaging with the community — sharing insights through public talks, academic lectures, and industry events at places like the University of Pisa, University of Cambridge, and ECRTS.I’m passionate about shaping the future of computing systems that are both powerful and predictable—and about connecting research with real-world impact.
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