Maruti Kakarla
- Role
- Senior Lead Engineer at Qualcomm
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Maruti Kakarla
I have an experience in RTL design, ASIC IP development, synthesis and verification, with…
Experience
Senior Lead Engineer
Dec 2020 — Present
RTL Design, VHDL/Verilog
Skills
- Vhdl
- Xilinx
- Tcl
- Debugging
- C
- Logic Synthesis
- Rtl Design
- Vivado
- Soc
- Simulink
- Synthesis and Simulation
- Linux
- Verilog Hdl
- Modelsim
- Sta
- Functional Verification
- System Verilog
- Matlab
- Hardware
- Edk
- Xilinx Ise
- Field-Programmable Gate Arrays (Fpga)
- Vlsi
- Static Timing Analysis
- Systems Design
- Systemverilog
- Simulations
- System on a Chip (Soc)
- Fpga Design and Verification
- Tcl-Tk
- Fpga
- Asic
- Very-Large-Scale Integration (Vlsi)
- Verilog
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