Mark Powers
- Role
- Senior Principal Design Engineer at ams OSRAM
- Location
- Dallas-Fort Worth, TX, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Mark Powers
Senior Principal Design Engineer / ASIC Designer, BS/MSEE with experience in all areas of…
Experience
Senior Principal Design Engineer
Jul 2023 — Present
Education
Oklahoma State University
MSEE, DSP, Digital Image Processing
Skills
- Extraction
- Lvs
- Integrated Circuit Design
- Simulation
- Synopsys Primetime
- Static Timing Analysis
- Dft
- Rtl Coding
- Physical Design
- Ic
- Timing Closure
- Formality
- Nc-Verilog
- Simulations
- Parasitic Extraction
- Drc
- Soc
- Verilog
- Microelectronics
- Adcs
- Primetime
- Synopsys Tools
- Simulink
- Atpg
- Matlab
- Magma
- Logic Synthesis
- Semiconductors
- Cadence
- Low-Power Design
- Formal Verification
- Asic
- Mixed Signal
- Clock Tree Synthesis
- Place & Route
- Eda
- Digital Signal Processing
- Floorplanning
- Tcl
- Low Power Design
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