Marc Polito

Sr. Principal Application Engineer

Role
Sr Principal Application Engineer at Cadence
Location
South Windsor, CT, US
LinkedIn followers
500 followers
Information TechnologyView LinkedIn profile

About Marc Polito

Current Focus: Advanced Packaging Flows - developing, improving and validating advance package flows for multi-die/chiplet designs using Virtuoso Studio and Allegro APD that enable Multiphysics System Analysis (MSA); electromagnetic and thermal analyses.A Senior Sales Engineer with in-depth experience successfully developing, supporting, and selling software solutions to leading companies in the semiconductor industry. Interacts professionally with customers using a rich set of Engineering, Sales and Marketing skills obtained while working for three industry leaders. Core strengths: • Customer Focused • Strong Analytical Skills • Presentation/Demo Skills • Influence Product Direction • Enthusiastic Learner • Experienced Traveler • Focused Work Ethic • Mentor/CoachSolid working knowledge of Analog IC design, successful IC flows and methodologies.Linux/Windows/VMware; Microsoft Office (Word, PowerPoint, Excel, Outlook)Specialties: Strategic / tactical planning, understanding customer needs, developing and executing targeted Sales campaigns, organizing demand creation events.Technical background: spice simulation; schematic capture; layout editing; DRC / LVS physical verification; parasitic extraction; IR/EM, power and thermal analysis; custom netlisting; IC design methodology assessment / refinement.

Experience

  1. Sr Principal Application Engineer

    Cadence

    Aug 2022 — Present

Education

  • Old Dominion University

    Electrical Engineering

    1983 — 1985

  • University of Colorado Colorado Springs

    MSEE, Electrical Engineering

    1993 — 1994

  • University of Colorado Colorado Springs

    BSEE, Electrical Engineering

    1985 — 1987

Skills

  • Semiconductor Industry
  • Parasitic Extraction
  • Spice
  • Signal Integrity
  • Layout Versus Schematic (Lvs)
  • Debugging
  • Linux
  • Soc
  • Power Management
  • Technical Leadership
  • Physical Verification
  • Virtuoso Layout Editor
  • Mixed Signal
  • Schematic Capture
  • Tactical Planning
  • Physical Design
  • Technical Account Management
  • Integrated Circuit Design
  • Tcl
  • Product Development
  • Eda
  • Cross-Functional Team Leadership
  • Analog Circuit Design
  • Cadence Virtuoso
  • Semiconductors
  • Cmos
  • Integrated Circuits (Ic)
  • Drc
  • Product Marketing
  • Lvs
  • Cadence
  • Ic

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Marc Polito — Sr Principal Application Engineer at Cadence in South Windsor, CT, US | Unifers