Marc Huerta
ASIC Design @ Apple || Stanford EE BS+MS || Apple / Stanford EE Scholar in Integrated Systems
- Role
- Asic Design Engineer at Apple
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Marc Huerta
Interested in building power-efficient hardware for machine learning
Experience
Asic Design Engineer
May 2025 — Present · Cupertino, CA, US
Education
Stanford University
Master of Science - MS
2023 — 2025
Stanford University
Bachelor of Science - BS
2019 — 2023
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