Anurag Mishra
Senior SoC & ASIC Leader | 25+ Years in Silicon Engineering | Advanced Node Execution | Global Team Builder | Marvell | Intel | TI | Cadence |
- Role
- Senior Staff Manager at Marvell Technology
- Location
- Pune District, MH, IN
- LinkedIn followers
- 500 followers
Manufacturing & ProductionView LinkedIn profile
About Anurag Mishra
I am a seasoned semiconductor engineering leader with over 25 years of global experience…
Experience
Senior Staff Manager
Aug 2019 — Present · Pune, IN
Skills
- Compilers
- Logic Synthesis
- Physical Design
- Vlsi
- Floorplanning
- Magma
- Functional Verification
- Very-Large-Scale Integration (Vlsi)
- Low-Power Design
- Clock Tree Synthesis
- Mixed Signal
- Lvs
- Logic Design
- Cadence
- Ic
- Timing Closure
- Integrated Circuit Design
- Microprocessors
- Cmos
- Fpga
- Soc
- Asic
- Primetime
- Tcl
- Analog
- Formal Verification
- Drc
- Dft
- Modelsim
- Static Timing Analysis
- Application-Specific Integrated Circuits (Asic)
- Semiconductors
- Physical Verification
- Systemverilog
- Embedded Systems
- Eda
- Rtl Design
- Verilog
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