Manu Singh
Formal Verification Engineer | Intel | Ex-Qualcomm | IIT DELHI
- Role
- Senior Design Verification Engineer at Intel
- Location
- Etawah, UP, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Manu Singh
Not a great fan of mathematics until I been a formal verification engineer
Experience
Senior Design Verification Engineer
Feb 2024 — Present · Bengaluru, IN
Education
Indian Institute of Technology, Delhi
Master of Technology - MTech, RDFT
2019 — 2021
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