Manti Singh
Validation Engineer @Intel
Santa Clara, CA, US
EMAILS
m••••••••@intel.com
MOBILE NUMBERS
+14•••••••74
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WORK HISTORY
Jun 2016 — Present
Validation Engineer @Intel
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Working on validation of Interconnects of next generation of server products. Successfully validated two generations of IP.
SKILLS
Logic DesignVerilogPhysical DesignDebuggingSocEdaAsicSystemverilogFunctional VerificationVery-Large-Scale Integration (Vlsi)VhdlVlsiApplication-Specific Integrated Circuits (Asic)ProcessorsRtl Design
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