Manoj Vajhallya
Senior Principal Engineer- IC Design at Broadcom
- Role
- Senior Principal Engineer- Ic Design at Broadcom
- Location
- Andover, MA, US
- LinkedIn followers
- 500 followers
About Manoj Vajhallya
Professional with 18 years of extensive experience in multiple domain of ASIC design. Successfully completed advanced multi-million gates system-on chips (SoC), multimedia IPs, DRAM controller IPs and DDR Phy from specification to tap-out.Strong knowledge of video/audio compression/decompression sub-system, processor sub-system, high performance DRAM controller and DDR phy, low power design techniques, RTL design and verification, synthesis, timing/power analysis, logic equivalence.Hands-on experience for all aspects of chip-development process from architecture, micro-architecture to implementation of functional block and subsystems in multi-core system of chip (SoC)
Experience
Senior Principal Engineer- Ic Design
Mar 2012 — Present · Boston, MA, US
Education
Indian Institute of Technology, Kharagpur
M. Tech, Micro Electronics and VLSI Design
1997 — 1998
Government Engineering College, Jabalpur, MP
B. E., Electronics and Communication
1991 — 1995
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.