Manoj Arora
Engineering Director-Design
- Role
- Silicon Architecture Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Silicon Architecture Engineer
Aug 2002 — Present · Bengaluru, IN
Arch/UArch and RTL implementation of Block Responsible for maintaining multi socket Coherency in Intel IA-32 based Xeon Server. Additional responsibility in the area of Ring, QPI, IIO, and Side Band (Msg Channel Protocol).
Education
Indian Institute of Technology, Delhi
B Tech
1998 — 2002
Skills
- Rtl Design
- Debugging
- Soc
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