Manmadharao Kopilasa
a & Ms Senior Layout Design Engineer @新思科技股份有限公司
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WORK HISTORY
a & Ms Senior Layout Design Engineer @新思科技股份有限公司
Bengaluru, IN
EDUCATION
Aditya Institute of Technology and Management
Bachelor of Technology
ABOUT MANMADHARAO KOPILASA
I’m a results-driven Senior Analog & Mixed-Signal Layout Engineer with over 7.6 years of experience designing and delivering high-performance layouts across leading-edge technology nodes—TSMC 3nm, 5nm, 7nm, 22nm, and 28nm FDSOI.• My core expertise spans OPAMP, Current Mirrors, Band Gap Reference (BGR), Low Drop Out (LDO), Phase Locked Loop (PLL), TX/RX blocks, and Data Converters, with a strong track record in quality-driven delivery and layout optimization.• I bring deep knowledge of industry-standard EDA tools like Synopsys Custom Compiler and Cadence Virtuoso.• Good knowledge scripting skills in SKILL, Shell, and TCL to automate flows and improve efficiency.• I\'m well-versed in running full physical verifications (DRC, LVS, PERC, EMIR) and driving tapeout readiness in collaboration with global teams.• Beyond execution, I’m passionate about layout innovation, mentoring, and continuous learning, ensuring that I stay ahead in a fast-evolving semiconductor world.
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