Manish Garg
Serdes Design at Cadence Design Systems
- Role
- Analog and Mix Signal Design at 铿腾设计系统公司
- Location
- Delhi, DL, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Manish Garg
High Speed Links, Serdes, Chiplets
Experience
Analog and Mix Signal Design
Oct 2020 — Present · Noida, IN
Education
Netaji Subhas Institute of Technology
Bachelor of Engineering (B.E), Electrical, Electronics and Communications Engineering
2002 — 2006
Skills
- Skill Code
- Cadence Virtuoso
- Asic
- Vlsi
- Synopsys Tools
- Unix Shell Scripting
- Application-Specific Integrated Circuits (Asic)
- Ic
- Semiconductors
- Debugging
- Simulations
- Very-Large-Scale Integration (Vlsi)
- Analog
- Mixed Signal
- Circuit Design
- Adexl
- Customer Service
- Cscope Aim Script
- Analog Circuit Design
- Eldo
- Product Development
- Cadence Spectre
- Perl
- Perl Script
- Perl Automation
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