Manish Arora
Memory IP Design | Project Lead | Synopsys Inc | X-TSMC | X-ST Micro
- Role
- Sram Ip Memory Design Manager at Synopsys Inc
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
Experience
Sram Ip Memory Design Manager
Jan 2018 — Present · San Jose, CA, US
Skills
- Characterization
- Low-Power Design
- Timing Closure
- Physical Verification
- Semiconductors
- Cmos
- Rtl Coding
- Embedded Memory Design
- Asic
- Soc
- Cadence Virtuoso
- Vlsi
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