Manikanta Siddi
Physical design Intern | Scripting | System Verilog HDVL | C++
- Role
- Physical Design Engineer C at Cadence
- Location
- Karimnagar, TG, IN
- LinkedIn followers
- 500 followers
Experience
Physical Design Engineer C
Mar 2026 — Present · Hyderabad, IN
Contractor from Soctronics
Education
MVSR Engineering College
Bachelor's degree, Electrical, Electronics and Communications Engineering
2021 — 2025
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.