Manikanta Chaitanya G
- Role
- Intel
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Manikanta Chaitanya G
Experienced Digital Designer (ASIC and FPGA) with Masters in Electrical Engineering -…
Experience
Present
Skills
- Verilog
- 10g Ethernet
- System on a Chip (Soc)
- Vlsi
- Static Timing Analysis
- Application-Specific Integrated Circuits (Asic)
- Microsoft Office
- Html
- Vhdl
- Unix
- Sql
- Fpga
- Rtl Design
- Soc
- Axi
- Outlook
- Asic
- Mipi Digrf
- C++
- Amba Ahb
- C
- Matlab
- Perl
- Linux
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