Manikanta Tiruveedula
Senior ASIC Design Engineer @ NVIDIA | MS ECE at Purdue | Apple | Samsung
- Role
- Senior Asic Rtl Design Engineer at NVIDIA
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Manikanta Tiruveedula
I am a graduate student in Electrical and Computer Engineering at Purdue University…
Experience
Senior Asic Rtl Design Engineer
May 2023 — Present · Santa Clara, CA, US
Education
National Institute of Technology, Tiruchirappalli
Bachelor of Technology (Hons)
2014 — 2018
Purdue University
Master of Science - MS
2021 — 2023
Narayana Junior College - Guntur
High School Diploma
2012 — 2014
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