Manikanta Kopparapu
Sr Lead Engineer @高通
Signup · Get unlimited contacts
WORK HISTORY
Sr Lead Engineer @高通
Hyderabad, IN
Working as a SoC Verification Engineer, part of MM bubble verification. Owns Video Block Verification (RTL,PA-RTL,PA-RTL GLS).
EDUCATION
Narayana Junior College
Intermediate, M.P.C
SVIST Engineering College
B.Tech, Electronics and Communication Engineering
Vellore Institute of Technology
Master’s Degree, VLSI DESIGN
Nagarjuna High school
S.S.C
SKILLS
ABOUT MANIKANTA KOPPARAPU
Having around 7+ year\'s of experience in various disciplines. 4 year\'s in both SOC/ IP Design & Verification, which includes developing RTL coding, Test Bench (driver, monitor & score board components), creating the test cases & integration. 3 year\'s in Pre Silicon Power Simulations & Post Silicon Validation (Running power simulations using PTPX tool and extracting the power numbers for the defined SOC level KPI\'s). Created the Power Architecture by discussing with the relevant stake holders. Integrated the Power Components & Connections in the SS for the created Power Architecture.Estimating the power numbers for the new age projects based on the legacy projects results by discussing the cross functional teams.Having exposure & Hands on Experience to RTL checks like lint, Synth, Low Power Tool CLP, UPF methodology. Having Hands on experience in SS Level Integration.
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.