Mangal Prasad

About Mangal Prasad

Analog/Mixed Signal engineer with proven track record for designing, architecting, as well as leading team to deliver SERDES, Power Management circuits, ring oscillator based and LC oscillator based Phase-Locked Loops. I have Taped-out circuit IP on over 20 different IC chips. Extensive experience in design flow and methodology of deep submicron technologies ranging from 3nm FinFET to 150nm planar MOSFETs. Have delivered several designs from conception to silicon as a lead, as well as providing characterization support and test plan support. I also have several patents and publications to my name as well.

Experience

1. Principal Engineer - Serdes Lead

   Honeywell Technologies

   May 2023 — Present · Minneapolis, MN, US

   Spearheaded the development of next-generation radiation-hardened mixed-signal IP, enhancing reliability for critical applications. • Designed and optimized voltage regulators, bandgaps, PLL, and SERDES components to meet stringent performance criteria.

Education

• State University of New York at Buffalo

  Master's of Science

• State University of New York at Buffalo

  Bachelor of Science (B.S.)

Skills

• Project Management
• Cmos
• I/O Design
• Vhdl
• Simulations
• Cadence Schematic Capture
• Linux
• Cadence Virtuoso Xl
• Pll
• Integrated Circuit Design
• Voltage Regulator
• Mixed Signal
• Circuit Design
• Analog Circuit Design
• Phase Locked Loops
• Unix
• People Skills
• Cadence Virtuoso Layout Editor
• Verilog-Ams
• Cadence Ams Simulator
• Cadence Spectre
• Perl
• Signal Integrity
• Voltage References
• Mixed-Signal Ic Design
• Cadence Virtuoso
• Digital Circuit Design