Manavalan Venugopal
Engineer @STMicroelectronics
Edinburgh, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Feb 2021 — Present
Engineer @STMicroelectronics
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SKILLS
QuestaDdrOpen Verification MethodologyDigitalPythonUsbXilinx VivadoIntegrated Circuit DesignGitXilinx IseRtl CodingVerilogPcieAsicShell ScriptingSystemverilogCoverage Driven VerificationRtl VerificationNand FlashUvmSystem VerilogFormal VerificationSystemcVhdlModelsimFunctional VerificationPerl ScriptAssertion Based Verification
ABOUT MANAVALAN VENUGOPAL
Experience in ASIC/FPGA Design Verification since July 2013 Knowledge of PCI Express…
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