Manaswini Pathi
Enthusiastic about Chip Designing | Physical Design Trainee at Maven Silicon Institute
- Role
- Asic Physical Design Engineer at Capgemini Engineering
- Location
- Tirupati Urban, AP, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Manaswini Pathi
Trained as a Physical Design Engineer in Maven Silicon Softech pvt.ltd>Have working knowledge on tools like Fusion Compiler | Primetime | Design Compiler>Dedicated and determined about my responsibilities.
Experience
Asic Physical Design Engineer
Nov 2024 — Present · Bengaluru, IN
Education
Vel Tech Technical University
Bachelor of Technology - BTech
2019 — 2023
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