Mallik Pamarthi
Senior Analog Layout Design Engineer at MosChip Semiconductors
- Role
- Analog Layout Design Engineer at MosChip®
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Mallik Pamarthi
Analog layout engineer at moschip semiconductors.• 5 years of experience on Analog & Mixed signal Layout designing.• Well experience on Virtuoso L & XL Layout design suits and Custom compiler ( Synopsys tool).• Well experience on Assura, PVS, Calibre verification tools.• Good experience on SLAM Layout Editor.• Well experience on LVS, DRC, QRC & Antenna checks and EMIR, PERC.• Working experience on different nodes like tsmc 12ffc, tsmc 16, tsmc4ff, tsmc5ff, tsmc6ff, tsmc7ff, tsmc7ff_plus, ss14, ss7, ss8, GF 14nm-Finfet, GF 28nm, TSMC 152, TSMC 150, TSMC 130nm, TSMC 22nm, TSMC 55nm, Samsung 28nm FDSOI, GPDK 45nm etc.
Experience
Analog Layout Design Engineer
Dec 2019 — Present · Hyderabad, IN
Education
Dhanekula Institute of Engineering & Technology, Ganguru, Penamalluru Mandal, PIN-521139(CC-8T)
Bachelor of Technology
2014 — 2017
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