Malkari Bhaskar

About Malkari Bhaskar

At UST, as a Senior Validation Engineer with over four years of experience, I contribute to advancing validation processes for NXP Semiconductor by focusing on board bring-up activities and validating Ethernet SGMII and PCIe components. Utilizing tools like Lauterbach Power Debugger and Spirent, I support high-quality debugging and testing to ensure robust deliverables. Previously at Wipro, I gained over two years of experience in post-silicon validation for ARM-based SoCs, with a focus on low-speed serial protocols, test case development, and hardware interface debugging. My expertise with tools such as Trace32 and JTAG has been instrumental in enhancing the reliability of IP subsystems and hardware solutions.

Experience

1. Senior Validation Engineer

   UST

   Feb 2022 — Present · Bengaluru, IN

   In my role at UST, I contributed significantly to the validation processes for NXP Semiconductor. I was responsible for board bring-up activities and validating critical components like Ethernet SGMII and PCIe. My hands-on experience with tools such as Lauterbach Power Debugger and Spirent enhanced our debugging capabilities and ensured high-quality deliverables.

Education

• Yogi Vemana University, Kadapa

  Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering

  2015 — 2018

• ESC GOVT POLYTECHNIC

  High School Diploma, Electrical, Electronics and Communications Engineering

  2012 — 2015