Malisetty Mamatha
DFT Engineer @cisco | ex- @ Altran part of Capgemini India Pvt Ltd | ex-Wipro employee
- Role
- Asic Dft Engineer at Cisco
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Malisetty Mamatha
As a dedicated DFT Engineer at Capgemini (Altran), my expertise lies in advanced fault simulation and pattern generation, where my academic background in VLSI from sree vidya nikethan Engineering college plays a pivotal role. At Altran, I have enhanced retarget pattern generation and post-silicon debug processes, contributing to the robustness of semiconductor technologies.Committed to driving excellence in Design for Testability, my competencies include scan insertion and scan compression, ensuring high fault coverage and efficient testing. With a strong grasp of Verilog and C, alongside fluency in English, Telugu, and Hindi, I effectively collaborate with diverse teams to push the boundaries of VLSI engineering.
Experience
Asic Dft Engineer
Nov 2025 — Present · Bengaluru, IN
Education
Sri Chaitanya Junior College
Intermediate, MPC
2008 — 2010
Tagore high school
Ssc
2007 — 2008
Yogi Vemana University, Kadapa
B.Tech, Electronics and communication engineering
2010 — 2014
sree vidya nikethan Engineering college
Post Graduation, Vlsi
2014 — 2016
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